Have a design (or a part of the design) you would like to implement using asynchronous fine-grain micropipeline?
Not sure about the micropipeline benefits for your particular design?
We can help! We can run your design through our synthesis flow using one of our proof of the concept libraries. Submit your synthesizable VHDL or Verilog code on this page and send a notification with any details you would like to include to Alexander Smirnov.
What you get in return:
- set of netlists (in VHDL or Verilog) that can be simulated using any HDL simulation tool including
- library cell models
- your design micropipeline implementation netlists functionally equivalent to the synchronous implementation of your design
- automatically generated test bench that can be used to evaluate dynamics of the micropipeline implementation
HDL code limitations
- must be synthesizable VHDL, Verilog or SystemVerilog where the synthesizable subset is that defined for the Synopsys Design Compiler;
- should not include constructs that infer tri-state logic - tri-state logic is currently unsupported; you may consider using a bus e.g. MARBLE;
Submit your design
Pack your project in a zip or tar archive. Include:
- synthesizable HDL files
- Synopsys Design Compiler synthesis scripts for your design (optional)
- HDL test bench (optional)
- any comments (area-performance trade-off you are targeting etc)
DISCLAIMER
We are a non-profit research group interested in development of the micropipeline synthesis flow. Currently we are using tools from Synopsys University package for research purposes only therefore we cannot engage in developing a product or iteratively tuning the implementation. The synthesis results are be provided for evaluation only.
We may analyze the example you submit to improve the synthesis results. We will not share your HDL, synthesis results or any other information about you or your design without explicit permission from you.
The synthesis results - the netlists are provided "as is", without any express or implied warranty. In particular, neither Alexander Smirnov nor Boston University make any representation or warranty of any kind concerning merchantability of the netlist or its fitness for any particular purpose.
